444 lines
14 KiB
Rust
444 lines
14 KiB
Rust
#![no_std]
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use core::cmp::max;
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use avr_device::{asm::delay_cycles, interrupt::free};
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use usb_device::{
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bus::{PollResult, UsbBus},
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endpoint::{EndpointAddress, EndpointType},
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Result as UsbResult, UsbDirection, UsbError,
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};
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mod types;
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pub use types::*;
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use types::{DPRAM_SIZE, ENDPOINTS_ALLOC_LAYOUT, ONE_MS_16_MGHZ};
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impl<const L: usize> UsbBus for UsbDevice<L> {
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fn alloc_ep(
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&mut self,
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ep_dir: UsbDirection,
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ep_addr: Option<EndpointAddress>,
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ep_type: EndpointType,
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max_packet_size: u16,
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_interval: u8,
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) -> UsbResult<EndpointAddress> {
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// Handle first endpoint. //
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free(|_cs| {
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if ep_addr == Some(EndpointAddress::from_parts(0, UsbDirection::In)) {
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Ok(ep_addr.unwrap())
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} else {
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let address = match ep_addr {
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// If current endpoint doesn't allocated, assign ep_addr to variable. //
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Some(addr) if !self.ep_table[addr.index()].is_allocated => addr,
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// If ep_aadr not provided, or current endpoint is allocated, try to find next free endpoint, otherwise return UsbError. //
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_ => {
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let index = self
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.ep_table
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.iter()
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.enumerate()
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.skip(1)
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.find(|(index, ep)| {
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!ep.is_allocated
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&& max_packet_size <= ENDPOINTS_ALLOC_LAYOUT[*index]
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})
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.ok_or(UsbError::EndpointOverflow)?
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.0;
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EndpointAddress::from_parts(index, ep_dir)
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}
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};
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// Select endpoint info by address index. //
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let target_endpoint = &mut self.ep_table[address.index()];
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// Get power of two number of endpoint size. //
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let ep_size = max(8, max_packet_size.next_power_of_two());
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// Endpoint allocation marker. //
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if DPRAM_SIZE - self.dpram_already_used < ep_size {
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Err(UsbError::EndpointMemoryOverflow)
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} else {
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// Set endpoint parameters. //
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target_endpoint.set_dir(ep_dir);
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target_endpoint.set_type(ep_type);
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target_endpoint.set_size(ep_size)?;
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// Add used dpram memory. //
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target_endpoint.is_allocated = true;
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self.dpram_already_used += ep_size;
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Ok(address)
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}
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}
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})
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}
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fn enable(&mut self) {
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free(|cs| {
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let (usb, pll) = (self.usb.borrow(cs), self.pll.borrow(cs));
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// Enable USB pads regulators. //
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usb.uhwcon.modify(|_, w| w.uvrege().set_bit());
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// PLL configuration //
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pll.pllcsr.write(|w| w.pindiv().set_bit());
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pll.pllfrq
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.write(|w| w.pdiv().mhz96().plltm().factor_15().pllusb().set_bit());
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// Enable PLL //
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pll.pllcsr.modify(|_, w| w.plle().set_bit());
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// Check PLL lock //
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while pll.pllcsr.read().plock().bit_is_clear() {}
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// Enable USB interface. //
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usb.usbcon
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.modify(|_, w| w.usbe().set_bit().otgpade().set_bit());
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// Unfreeze clock. //
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usb.usbcon
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.modify(|_, w| w.frzclk().clear_bit().vbuste().set_bit());
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// Endpoint configuration //
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self.allocated_endpoints().for_each(|(i, _ep)| {
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self.configure_endpoint(cs, i).unwrap();
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});
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// Set high speed and attach the USB. //
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usb.udcon
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.modify(|_, w| w.detach().clear_bit().lsm().clear_bit());
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// Interrupts. //
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usb.udien
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.modify(|_, w| w.eorste().set_bit().sofe().set_bit());
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})
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}
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fn force_reset(&self) -> UsbResult<()> {
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free(|cs| {
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let usbcon = &self.usb.borrow(cs).usbcon;
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usbcon.modify(|_, w| w.usbe().set_bit());
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});
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delay_cycles(ONE_MS_16_MGHZ);
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free(|cs| {
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let usbcon = &self.usb.borrow(cs).usbcon;
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usbcon.modify(|_, w| w.usbe().set_bit());
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});
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Ok(())
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}
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fn is_stalled(&self, ep_addr: EndpointAddress) -> bool {
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free(|cs| match self.select_endpoint(cs, ep_addr.index()) {
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Ok(_) => self.usb.borrow(cs).ueconx.read().stallrq().bit_is_set(),
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Err(_) => false,
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})
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}
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fn poll(&self) -> PollResult {
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free(|cs| {
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let usb = self.usb.borrow(cs);
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let (udint, udien, usbint) = (usb.udint.read(), usb.udien.read(), usb.usbint.read());
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if usbint.vbusti().bit_is_set() {
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usb.usbint.write(|w|
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// unsafe { w.bits(0x01) }
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w.vbusti().clear_bit());
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if usb.usbsta.read().vbus().bit_is_set() {
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return PollResult::Resume;
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} else {
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return PollResult::Suspend;
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}
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}
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if udint.suspi().bit_is_set() && udien.suspe().bit_is_set() {
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return PollResult::Suspend;
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}
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if udint.wakeupi().bit_is_set() && udien.wakeupe().bit_is_set() {
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return PollResult::Resume;
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}
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if udint.eorsti().bit_is_set() {
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return PollResult::Reset;
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}
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if udint.sofi().bit_is_set() {
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usb.udint.write(|w|
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// unsafe { w.bits(0x7d) }
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w.sofi().clear_bit());
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}
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if usb.usbcon.read().frzclk().bit_is_clear() {
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let (mut ep_out, mut ep_in_complete, mut ep_setup) = (0u16, 0u16, 0u16);
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let pending_ins = self.pending_ins.borrow(cs);
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for (ep_index, _ep) in self.allocated_endpoints() {
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if self.select_endpoint(cs, ep_index).is_err() {
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break;
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} else {
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let ueintx = usb.ueintx.read();
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if ueintx.rxouti().bit_is_set() {
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ep_out |= 1 << ep_index;
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}
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if ueintx.rxstpi().bit_is_set() {
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ep_setup |= 1 << ep_index;
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}
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if pending_ins.get() & (1 << ep_index) != 0 && ueintx.txini().bit_is_set() {
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ep_in_complete |= 1 << ep_index;
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pending_ins.set(pending_ins.get() & !(1 << ep_index));
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}
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}
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}
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if ep_out | ep_in_complete | ep_setup != 0 {
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return PollResult::Data {
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ep_out,
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ep_in_complete,
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ep_setup,
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};
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}
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}
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PollResult::None
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})
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}
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fn read(&self, ep_addr: EndpointAddress, buf: &mut [u8]) -> UsbResult<usize> {
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free(|cs| {
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let usb = self.usb.borrow(cs);
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if let Err(error) = self.select_endpoint(cs, ep_addr.index()) {
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Err(error)
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} else {
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let ep = &self.ep_table[ep_addr.index()];
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if ep.ep_type == 0 {
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let ueintx = usb.ueintx.read();
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if ueintx.rxouti().bit_is_clear() && ueintx.rxstpi().bit_is_clear() {
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return Err(UsbError::WouldBlock);
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}
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let buf_size = self.get_size(cs);
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if buf.len() < buf_size {
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return Err(UsbError::BufferOverflow);
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}
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for byte in &mut buf[..buf_size] {
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*byte = usb.uedatx.read().bits();
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}
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usb.ueintx.write(|w| {
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/* unsafe { w.bits(0xdf) } */
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w.rxouti().clear_bit().rxstpi().clear_bit()
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});
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Ok(buf_size)
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} else {
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if usb.ueintx.read().rxouti().bit_is_clear() {
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return Err(UsbError::WouldBlock);
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}
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usb.ueintx.write(|w|
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// unsafe { w.bits(0xdf) }
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w.rxouti().clear_bit());
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let mut bytes_read = 0;
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for slot in buf {
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if usb.ueintx.read().rwal().bit_is_clear() {
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break;
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}
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*slot = usb.uedatx.read().bits();
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bytes_read += 1;
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}
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if usb.ueintx.read().rwal().bit_is_set() {
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return Err(UsbError::BufferOverflow);
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}
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usb.ueintx.write(|w|
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// unsafe { w.bits(0xdf) }
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w.fifocon().clear_bit());
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Ok(bytes_read)
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}
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}
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})
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}
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fn reset(&self) {
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free(|cs| {
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let usb = self.usb.borrow(cs);
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usb.udint.modify(|_, w| w.eorsti().clear_bit());
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self.allocated_endpoints().for_each(|(i, _)| {
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self.configure_endpoint(cs, i).unwrap();
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});
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// Clear resume informations. //
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usb.udint.write(|w| {
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// unsafe { w.bits(0x7d) }
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w.wakeupi().clear_bit().suspi().clear_bit()
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});
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usb.udien
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.modify(|_, w| w.wakeupe().clear_bit().suspe().set_bit());
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})
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}
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fn resume(&self) {
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free(|cs| {
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let (usb, pll) = (self.usb.borrow(cs), self.pll.borrow(cs));
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// PLL enable //
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pll.pllcsr
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.modify(|_, w| w.pindiv().set_bit().plle().set_bit());
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while pll.pllcsr.read().plock().bit_is_clear() {}
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// Resuming //
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usb.usbcon.modify(|_, w| w.frzclk().clear_bit());
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usb.udint.write(|w| {
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// unsafe { w.bits(0x7d) }
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w.wakeupi().clear_bit().suspi().clear_bit()
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});
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usb.udien
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.modify(|_, w| w.wakeupe().clear_bit().suspe().set_bit());
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})
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}
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fn set_device_address(&self, addr: u8) {
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free(|cs| {
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let usb = self.usb.borrow(cs);
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// Set address. //
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usb.udaddr.modify(|_, w| w.uadd().bits(addr));
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// Note: ADDEN and UADD shall not be written at the same time.
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// (written in atmega32u4/16u4 docs)
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// Enable. //
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usb.udaddr.modify(|_, w| w.adden().set_bit());
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});
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}
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fn set_stalled(&self, ep_addr: EndpointAddress, stalled: bool) {
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free(|cs| {
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let usb = self.usb.borrow(cs);
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if self.select_endpoint(cs, ep_addr.index()).is_ok() {
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usb.ueconx
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.modify(|_, w| w.stallrq().bit(stalled).stallrqc().bit(!stalled));
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}
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});
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}
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fn suspend(&self) {
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free(|cs| {
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let (usb, pll) = (self.usb.borrow(cs), self.pll.borrow(cs));
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usb.udint.write(|w| {
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// unsafe { w.bits(0x7d) }
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w.wakeupi().clear_bit().suspi().clear_bit()
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});
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// Suspend. //
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usb.udien
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.modify(|_, w| w.wakeupe().set_bit().suspe().clear_bit());
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// Freeze clock. //
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usb.usbcon.modify(|_, w| w.frzclk().set_bit());
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// Disable PLL. //
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pll.pllcsr.modify(|_, w| w.plle().clear_bit());
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})
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}
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fn write(&self, ep_addr: EndpointAddress, buf: &[u8]) -> UsbResult<usize> {
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free(|cs| {
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let usb = self.usb.borrow(cs);
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if let Err(error) = self.select_endpoint(cs, ep_addr.index()) {
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Err(error)
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} else {
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let ep = &self.ep_table[ep_addr.index()];
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// Endpoint type confitions //
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if ep.ep_type == 0 {
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if usb.ueintx.read().txini().bit_is_clear() {
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return Err(UsbError::WouldBlock);
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}
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if buf.len() > ep.get_size() {
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return Err(UsbError::BufferOverflow);
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}
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for &byte in buf {
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usb.uedatx.write(|w| w.bits(byte));
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}
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usb.ueintx.write(|w|
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// unsafe { w.bits(0xdf) }
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w.txini().clear_bit());
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} else {
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if usb.ueintx.read().txini().bit_is_clear() {
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return Err(UsbError::WouldBlock);
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}
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usb.ueintx.write(|w| {
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// unsafe { w.bits(0xdf) }
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w.txini().clear_bit().rxouti().clear_bit()
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});
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for &byte in buf {
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if usb.ueintx.read().rwal().bit_is_set() {
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usb.uedatx.write(|w| w.bits(byte));
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} else {
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return Err(UsbError::BufferOverflow);
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}
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}
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usb.ueintx.write(|w| {
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// unsafe { w.bits(0xdf) }
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w.rxouti().clear_bit().fifocon().clear_bit()
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});
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}
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let pending_ins = self.pending_ins.borrow(cs);
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pending_ins.set(pending_ins.get() | 1 << ep_addr.index());
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Ok(buf.len())
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}
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})
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}
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}
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