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refactor: add a check for a non-zero denominator

This commit is contained in:
doryan 2024-08-03 00:01:58 +04:00
parent ebf7d9b85c
commit 81b22a14c9
1 changed files with 15 additions and 3 deletions
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12
src/controller/model_utils/signal_reducer.rs
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@ -1,6 +1,10 @@
#[allow(non_snake_case)] #[allow(non_snake_case)]
pub fn reactive_resistance_of_capacitor(Cm: f64, L: f64, f: f64) -> f64 { pub fn reactive_resistance_of_capacitor(Cm: f64, L: f64, f: f64) -> f64 {
if f == 0.0 || Cm == 0.0 || L == 0.0 {
0.0
} else {
1f64 / (2f64 * std::f64::consts::PI * f * Cm * L) 1f64 / (2f64 * std::f64::consts::PI * f * Cm * L)
}
} }
#[allow(non_snake_case)] #[allow(non_snake_case)]
@ -10,10 +14,18 @@ pub fn full_resistance_of_capacitor(Xc: f64, Rs: f64, Rm: f64, L: f64) -> f64 {
#[allow(non_snake_case)] #[allow(non_snake_case)]
pub fn voltage_from_signal_source(Vs: f64, Xc: f64, Z: f64) -> f64 { pub fn voltage_from_signal_source(Vs: f64, Xc: f64, Z: f64) -> f64 {
if Z == 0.0 {
0.0
} else {
(Vs * Xc) / Z (Vs * Xc) / Z
}
} }
#[allow(non_snake_case)] #[allow(non_snake_case)]
pub fn coef_of_signal_reduce(Vs: f64, V: f64) -> f64 { pub fn coef_of_signal_reduce(Vs: f64, V: f64) -> f64 {
if V == 0.0 {
0.0
} else {
Vs / V Vs / V
}
} }