feat(UsbBus): move UsbBus implementation to lib.rs file and implement set_stalled, suspend and etc
This commit is contained in:
parent
e9d661e9e3
commit
652ba78cdf
234
src/lib.rs
234
src/lib.rs
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@ -1,6 +1,139 @@
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#![no_std]
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use core::cmp::max;
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use avr_device::interrupt::free;
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use usb_device::{
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bus::{PollResult, UsbBus},
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endpoint::{EndpointAddress, EndpointType},
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Result as UsbResult, UsbDirection, UsbError,
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};
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mod types;
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use types::{UsbDevice, DPRAM_SIZE, ENDPOINTS_ALLOC_LAYOUT};
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impl<const L: usize> UsbBus for UsbDevice<L> {
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fn alloc_ep(
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&mut self,
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ep_dir: UsbDirection,
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ep_addr: Option<EndpointAddress>,
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ep_type: EndpointType,
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max_packet_size: u16,
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_interval: u8,
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) -> UsbResult<EndpointAddress> {
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// Handle first endpoint. //
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if ep_addr == Some(EndpointAddress::from_parts(0, UsbDirection::In)) {
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return Ok(ep_addr.unwrap());
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}
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let address = match ep_addr {
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// If current endpoint doesn't allocated, assign ep_addr to variable. //
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Some(ep_addr) if !self.ep_table[ep_addr.index()].is_allocated => ep_addr,
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// If ep_aadr not provided, or current endpoint is allocated, try to find next free endpoint, otherwise return UsbError. //
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None | Some(_) => {
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let endpoint = self
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.ep_table
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.iter()
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.enumerate()
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.skip(1)
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.find(|(i, &ep)| {
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!ep.is_allocated && max_packet_size <= ENDPOINTS_ALLOC_LAYOUT[*i]
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})
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.ok_or(UsbError::EndpointMemoryOverflow)?;
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EndpointAddress::from_parts(endpoint.0, ep_dir)
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}
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};
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// Select endpoint info by address index. //
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let target_endpoint = &mut self.ep_table[address.index()];
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// Endpoint allocation marker. //
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if DPRAM_SIZE - self.dpram_already_used <= max_packet_size || max_packet_size >= 512 {
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Err(UsbError::EndpointMemoryOverflow)
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} else {
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// Get power of two number of endpoint size. //
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let max_packet_size = max(8, max_packet_size.next_power_of_two());
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// Set endpoint parameters. //
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target_endpoint.set_size(max_packet_size);
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target_endpoint.set_dir(ep_dir);
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target_endpoint.set_type(ep_type);
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target_endpoint.is_allocated = true;
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// Add used dpram memory. //
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self.dpram_already_used += max_packet_size;
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Ok(address)
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}
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}
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fn enable(&mut self) {
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free(|cs| {
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let (pll, usb) = (self.pll.borrow(cs), self.usb.borrow(cs));
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// Enable USB pads regulators. //
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usb.uhwcon.modify(|_, w| w.uvrege().set_bit());
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// Enable USB interface. //
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usb.usbcon
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.modify(|_, w| w.usbe().set_bit().frzclk().set_bit());
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// Configuring PLL. //
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pll.pllfrq
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.modify(|_, w| w.pdiv().mhz96().plltm().factor_15().pllusb().set_bit());
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// Enable PLL. //
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pll.pllcsr
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.modify(|_, w| w.pindiv().set_bit().plle().set_bit());
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while pll.pllcsr.read().plock().bit_is_clear() {}
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// Unfreeze clock. //
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usb.usbcon
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.modify(|_, w| w.frzclk().clear_bit().otgpade().set_bit());
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// Interrupts. //
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usb.udien
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.modify(|_, w| w.eorste().set_bit().sofe().set_bit());
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// Set high speed and attach the USB. //
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usb.udcon
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.modify(|_, w| w.lsm().set_bit().detach().clear_bit());
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})
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}
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fn force_reset(&self) -> UsbResult<()> {
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free(|cs| {
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let usb = self.usb.borrow(cs);
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usb.usbcon.modify(|_, w| w.usbe().clear_bit());
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usb.usbcon.modify(|_, w| w.usbe().set_bit());
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Ok(())
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})
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}
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fn is_stalled(&self, ep_addr: EndpointAddress) -> bool {
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free(|cs| match self.select_endpoint(cs, ep_addr.index()) {
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Ok(_) => self.usb.borrow(cs).ueconx.read().stallrq().bit_is_clear(),
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Err(_) => false,
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})
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}
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fn poll(&self) -> PollResult {
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free(|cs| {
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let usb = self.usb.borrow(cs);
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@ -121,6 +254,106 @@ mod types;
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}
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})
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}
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fn reset(&self) {
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free(|cs| {
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let usb = self.usb.borrow(cs);
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usb.udint.modify(|_, w| w.eorsti().clear_bit());
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// Disabling all endpoints before it reset //
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self.ep_table
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.iter()
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.filter(|&&ep| ep.is_allocated)
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.enumerate()
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.for_each(|(index, _ep)| {
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if self.select_endpoint(cs, index).is_ok() {
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usb.ueconx.modify(|_, w| w.epen().clear_bit());
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}
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});
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// Reset endpoints //
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usb.uerst.modify(|_, w| unsafe { w.bits(u8::MAX >> 1) });
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// Clear resume informations. //
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usb.udint
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.modify(|_, w| w.wakeupi().clear_bit().suspi().clear_bit());
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usb.udien
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.modify(|_, w| w.wakeupe().clear_bit().suspe().set_bit());
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})
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}
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fn resume(&self) {
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free(|cs| {
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let usb = self.usb.borrow(cs);
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let pll = self.pll.borrow(cs);
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// Enable PLL and wait PLL lock. //
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pll.pllcsr.modify(|_, w| w.plle().set_bit());
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while pll.pllcsr.read().plock().bit_is_clear() {}
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// Unfreeze USB clock. //
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usb.usbcon.modify(|_, w| w.frzclk().clear_bit());
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// Clear resume informations. //
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usb.udint
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.modify(|_, w| w.wakeupi().clear_bit().suspi().clear_bit());
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usb.udien
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.modify(|_, w| w.wakeupe().clear_bit().suspe().set_bit());
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})
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}
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fn set_device_address(&self, addr: u8) {
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free(|cs| {
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let usb = self.usb.borrow(cs);
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// Set address. //
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usb.udaddr.modify(|_, w| w.uadd().bits(addr));
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// Note: ADDEN and UADD shall not be written at the same time.
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// (written in atmega32u4/16u4 docs)
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// Enable. //
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usb.udaddr.modify(|_, w| w.adden().set_bit());
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});
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}
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fn set_stalled(&self, ep_addr: EndpointAddress, stalled: bool) {
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free(|cs| {
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let usb = self.usb.borrow(cs);
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if self.select_endpoint(cs, ep_addr.index()).is_ok() {
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usb.ueconx
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.modify(|_, w| w.stallrq().bit(stalled).stallrqc().bit(!stalled));
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}
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});
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}
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fn suspend(&self) {
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free(|cs| {
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let usb = self.usb.borrow(cs);
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let pll = self.pll.borrow(cs);
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usb.udint
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.modify(|_, w| w.suspi().clear_bit().wakeupi().clear_bit());
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usb.udien
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.modify(|_, w| w.suspe().clear_bit().wakeupe().clear_bit());
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usb.usbcon.modify(|_, w| w.frzclk().set_bit());
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pll.pllcsr.modify(|_, w| w.plle().clear_bit());
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})
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}
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fn write(&self, ep_addr: EndpointAddress, buf: &[u8]) -> UsbResult<usize> {
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free(|cs| {
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let usb = self.usb.borrow(cs);
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@ -171,3 +404,4 @@ mod types;
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}
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})
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}
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}
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@ -149,189 +149,3 @@ impl<const L: usize> UsbDevice<L> {
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}
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}
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impl<const L: usize> UsbBus for UsbDevice<L> {
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fn alloc_ep(
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&mut self,
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ep_dir: UsbDirection,
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ep_addr: Option<EndpointAddress>,
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ep_type: EndpointType,
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max_packet_size: u16,
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_interval: u8,
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) -> UsbResult<EndpointAddress> {
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// Handle first endpoint. //
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if ep_addr == Some(EndpointAddress::from_parts(0, UsbDirection::In)) {
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return Ok(ep_addr.unwrap());
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}
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let address = match ep_addr {
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// If current endpoint doesn't allocated, assign ep_addr to variable. //
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Some(ep_addr) if !self.ep_table[ep_addr.index()].is_allocated => ep_addr,
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// If ep_aadr not provided, or current endpoint is allocated, try to find next free endpoint, otherwise return UsbError. //
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None | Some(_) => {
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let endpoint = self
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.ep_table
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.iter()
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.enumerate()
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.skip(1)
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.find(|(i, &ep)| {
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!ep.is_allocated && max_packet_size <= ENDPOINTS_ALLOC_LAYOUT[*i]
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})
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.ok_or(UsbError::EndpointMemoryOverflow)?;
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EndpointAddress::from_parts(endpoint.0, ep_dir)
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}
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};
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// Select endpoint info by address index. //
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let target_endpoint = &mut self.ep_table[address.index()];
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// Endpoint allocation marker. //
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if DPRAM_SIZE - self.dpram_already_used <= max_packet_size || max_packet_size >= 512 {
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Err(UsbError::EndpointMemoryOverflow)
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} else {
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// Get power of two number of endpoint size. //
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let max_packet_size = max(8, max_packet_size.next_power_of_two());
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// Set endpoint parameters. //
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target_endpoint.set_size(max_packet_size);
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target_endpoint.set_dir(ep_dir);
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target_endpoint.set_type(ep_type);
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target_endpoint.is_allocated = true;
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// Add used dpram memory. //
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self.dpram_already_used += max_packet_size;
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Ok(address)
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}
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}
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fn enable(&mut self) {
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free(|cs| {
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let (pll, usb) = (self.pll.borrow(cs), self.usb.borrow(cs));
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// Enable USB pads regulators. //
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usb.uhwcon.modify(|_, w| w.uvrege().set_bit());
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// Enable USB interface. //
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usb.usbcon
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.modify(|_, w| w.usbe().set_bit().frzclk().set_bit());
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// Configuring PLL. //
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pll.pllfrq
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.modify(|_, w| w.pdiv().mhz96().plltm().factor_15().pllusb().set_bit());
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// Enable PLL. //
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pll.pllcsr
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.modify(|_, w| w.pindiv().set_bit().plle().set_bit());
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while pll.pllcsr.read().plock().bit_is_clear() {}
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// Unfreeze clock. //
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usb.usbcon
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.modify(|_, w| w.frzclk().clear_bit().otgpade().set_bit());
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// Interrupts. //
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usb.udien
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.modify(|_, w| w.eorste().set_bit().sofe().set_bit());
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// Set high speed and attach the USB. //
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usb.udcon
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.modify(|_, w| w.lsm().set_bit().detach().clear_bit());
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})
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}
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fn force_reset(&self) -> usb_device::Result<()> {
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free(|cs| {
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let usb = self.usb.borrow(cs);
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usb.usbcon.modify(|_, w| w.usbe().clear_bit());
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usb.usbcon.modify(|_, w| w.usbe().set_bit());
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Ok(())
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})
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}
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fn is_stalled(&self, ep_addr: EndpointAddress) -> bool {
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todo!();
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}
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fn poll(&self) -> PollResult {
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todo!();
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}
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fn read(&self, ep_addr: EndpointAddress, buf: &mut [u8]) -> usb_device::Result<usize> {
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todo!();
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}
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fn reset(&self) {
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todo!();
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}
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fn resume(&self) {
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free(|cs| {
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let usb = self.usb.borrow(cs);
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let pll = self.pll.borrow(cs);
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// Enable PLL and wait PLL lock. //
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pll.pllcsr.modify(|_, w| w.plle().set_bit());
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while pll.pllcsr.read().plock().bit_is_clear() {}
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// Unfreeze USB clock. //
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usb.usbcon.modify(|_, w| w.frzclk().clear_bit());
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// Clear resume informations. //
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usb.udint
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.modify(|_, w| w.wakeupi().clear_bit().suspi().clear_bit());
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usb.udien
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.modify(|_, w| w.wakeupe().clear_bit().suspe().set_bit());
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})
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}
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fn set_device_address(&self, addr: u8) {
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free(|cs| {
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let usb = self.usb.borrow(cs);
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// Set address. //
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usb.udaddr.modify(|_, w| w.uadd().bits(addr));
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// Note: ADDEN and UADD shall not be written at the same time.
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// (written in atmega32u4/16u4 docs)
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// Enable. //
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usb.udaddr.modify(|_, w| w.adden().set_bit());
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});
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}
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fn set_stalled(&self, ep_addr: EndpointAddress, stalled: bool) {
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todo!();
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}
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fn suspend(&self) {
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todo!();
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}
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fn write(&self, ep_addr: EndpointAddress, buf: &[u8]) -> UsbResult<usize> {
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todo!();
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}
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}
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